The present invention relates to matrix-type display apparatus and, more particularly, to an improved matrix-type display apparatus in which degradation of display characteristics thereof is mitigated which is attributable to delay of gate signals due to an increase in the resistance of a gate signal line.
Typically, a matrix-type display apparatus comprises two transparent insulative substrates opposed to each other, each having an electrode film and an orientation film on a surface thereof, and a displaying material, such as a liquid crystal, interposed between the pair of substrates in the gap defined therebetween. This displaying material is applied with a voltage on a pixel basis to display an image. The electrode film on at least one of the substrates is composed of transparent electrically-conductive films arranged in a matrix-like manner to form pixel electrodes. There are further provided switching elements, such as thin film transistors (TFTs), for selectively applying a voltage to these pixel electrodes and capacitors for storing electric charge. The TFT array substrate of a conventional matrix-type display apparatus is shown in FIGS. 5 and 6. FIG. 5 is a plan view of one pixel portion of such TFT array substrate, and FIG. 6 is a sectional view taken along line VI--VI of FIG. 5.
In FIGS. 5 and 6, the TFT array substrate includes a source electrode line 1, a gate electrode 2, a gate signal line 3, a gate insulating film 4, a non-doped amorphous silicon layer 5, an etching stopper 6, a phosphorus-doped amorphous silicon layer 7, a drain electrode 8, a pixel electrode 9 formed of a transparent conductive film and connected to the drain electrode 8, a protective film 1 0, a capacitive insulating film 11, a capacitive electrode 12, and a transparent insulative substrate 30.
Such a TFT array substrate is fabricated by the following process. Initially, the capacitive electrode 12 such as made of chromium is formed on the transparent insulative substrate 30 in an island-like manner. The capacitive insulating film 11 is then formed, followed by forming a contact hole 11a through the capacitive insulating film 11 by etching or a like process for providing electrical contact of the capaciting electrode 12 to the gate electrode 2 and to the gate signal line 3 to be formed later. Subsequently, the gate electrode 2 and the gate signal line 3 are formed, followed by the formation of the pixel electrode 9. Thereafter, the gate insulating film 4 and functional layers, i.e., the non-doped amorphous silicon layer 5 and phosphorus-doped amorphous silicon layer 7 are formed, followed by patterning. Finally, the source electrode line 1 and the drain electrode 8 are formed. Thus, a TFT is constructed. This TFT and the pixel electrode 9 form a part of the TFT array. In this TFT array substrate, the pixel electrode 9 overlaps the capacitor dielectric film 11 so that the capacitive insulating film 11 is interposed between the capacitive electrode 12 connected to the gate signal line 3 of the adjacent TFT section and the pixel electrode 9, thereby forming a capacitor.
The TFT array substrate thus constructed and a counterpart electrode substrate having a color filter, transparent conductive film and the like are disposed in opposing relation as interposing a display material such as a liquid crystal therebetween, thus constructing the matrix-type display apparatus.
In the conventional matrix-type display apparatus, a voltage is applied to the gate electrode provided to each pixel through the gate signal line to turn the pixel ON. However, since this gate signal line is connected to the capacitor to improve the capacitive characteristics of the apparatus, the capacitance of the gate signal line is increased, so that a gate signal applied to a pixel near the terminal end of the gate signal line is delayed with respect to a gate signal applied to a pixel near the input terminal of the gate signal line. Due to this delay of gate signal, the voltage applied to each pixel electrode does not reach a predetermined value thereby degrading the display quality of the apparatus.
Further, in the conventional matrix-type display apparatus only the gate insulating film is provided as an insulator in a portion where the gate signal line and the source signal line intersect each other. Hence, when a failure occurs in the gate insulating film lying in such intersecting portion, a current leakage occurs between the gate signal line and the source signal line to cause a defective display. This results in a difficulty in improving the yield of production of display apparatus.
The present invention has been attained to overcome the foregoing problems. It is, therefore, an object of the present invention to provide a matrix-type display apparatus in which the occurrence of a gate signal delay is suppressed and the shortcircuiting between the gate signal line and the source signal line is prevented.